Here's my page on what I think are valuable links for those who build chips. After your trip here you may want to check out our counterparts on the west coast in Carver Mead's Physics of Computation Lab at Cal Tech.
Of course, to build chips you need tools. At the very least you need a layout editor to actually draw out the individual circuits you want to build. There are 2 basic choices we use here, either the commercially available Tanner Tools ( L-Edit, LVS etc. ) or you can go with the public domain layout editor MAGIC. I Personally prefer to use MAGIC. However, there are those in the lab that prefer to use the Tanner Tools to design their chips. Each has its own advantages.
The Tanner tools will run on a 386/486 PC, which is both common and relatively cheap. MAGIC runs under UNIX/X11 and thus requires a machine that can run this (i.e. a workstation). However, with the availability of free versions of UNIX, such as FreeBSD. and Linux. that run on 386/486 PCs this is still an option if you are willing to move away from DOS. There are many other tools, both professional and public domain with varying degrees of complexity and sophistication available. I neither have nor use them so why discuss it.
The University of Idaho maintains an excellent collection of links to other WWW servers with information on VLSI CAD tools and other related topics. If you are new to the VLSI scene, or have questions concerning these or other VLSI CAD tools, you may want to read the COMP.LSI.CAD faq for more information. The Microelectronic Systems Newsletter is another good source of VLSI CAD tools information.
Once you have designed your chip you will most likely want to get it fabricated. We use MOSIS to fabricate our chips. It takes about 6-8 weeks for the typical project to get back to you.
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